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24C08B/16B
FIGURE 7-1:
CURRENT ADDRESS READ
S
BUS ACTIVITY
MASTER
T
A
R
CONTROL
BYTE
DATA n
S
T
O
T
P
SDA LINE
S
A
N
P
BUS ACTIVITY
FIGURE 7-2:
RANDOM READ
C
K
O
A
C
K
R
S
T
BUS ACTIVITY A
MASTER
T
CONTROL
BYTE
WORD
ADDRESS (n)
S
T
A
R
T
CONTROL
BYTE
DATA (n)
S
T
O
P
SDA LINE
BUS ACTIVITY
S
A
C
K
A
C
K
S
A
C
K
N
O
A
P
C
K
FIGURE 7-3:
SEQUENTIAL READ
S
T
BUS ACTIVITY
MASTER
CONTROL
BYTE
DATA n
DATA n + 1
DATA n + 2
DATA n + X
O
P
SDA LINE
P
A
A
A
A
N
BUS ACTIVITY
C
K
C
K
C
K
C
K
O
A
C
K
8.0
PIN DESCRIPTIONS
8.3
WP
8.1
SDA Serial Address/Data Input/Output
This pin must be connected to either V SS or V CC .
This is a Bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pull-up
resistor to V CC (typical 10 k ? ).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the START and STOP condi-
If tied to V SS , normal memory operation is enabled
(read/write the entire memory 000-7FF).
If tied to V CC , WRITE operations are inhibited. The
entire memory will be write-protected. Read operations
are not affected.
This feature allows the user to use the 24C08B/16B as
a serial ROM when WP is enabled (tied to V CC ).
tions.
8.4
A0, A1, A2
8.2
SCL Serial Clock
These pins are not used by the 24C08B/16B. They
This input is used to synchronize the data transfer from
and to the device.
DS21081G-page 8
may be left floating or tied to either V SS or V CC .
? 2004 Microchip Technology Inc.
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